Teaching and Service Experience

• Current Position: Associate Professor, Department of Electronic Engineering, National Formosa University (2025/02 - Present)
• Past Experiences:
  • Assistant Professor, Department of Electronic Engineering, National Formosa University (2018/02 - 2025/01)
  • Section Chief, Student Recruitment Section, Office of Academic Affairs, National Formosa University (2018/08 - 2020/01)
  • Assistant Researcher, National Chip Implementation Center (CIC) (2015/09 - 2017/09)
  • Yield Enhancement Engineer, ProMOS Technologies (2007/01 - 2009/06)
  • Digital IC Design Engineer, RAiO Technology (2003/06 - 2004/11)
  • System Design Engineer, IC Plus Corp. (2001/11 - 2003/06)
  • Adjunct Lecturer, Department of Computer Science and Information Engineering, Chaoyang University of Technology (2014/02 - 2015/01)
  • Adjunct Lecturer, Department of Electronic Engineering, National Chin-Yi University of Technology (2009/08 - 2014/07)
  • Adjunct Lecturer, Department of Computer Science and Information Engineering, Chaoyang University of Technology (2011/02 - 2012/01)

Expertise

• RF Integrated Circuit Design
• Mixed-Signal Integrated Circuit Design
• Digital Integrated Circuit Design
• Wireless Application SoC Design
• FPGA System Application Design
• Circuit System Application Design

Research Projects

1. Design of a Novel Low-Power Frequency Synthesizer for 5G Applications (2018.12.01 - 2019.11.30)

1. Integrated Circuit Design of Multiplying Digital-to-Analog Converter (2023.02.21 - 2023.07.31)
2. Integration and Testing of Multiplying Digital-to-Analog Converter Integrated Circuit Design (2023.08.01 - 2024.01.31)

Publications

1. Y. H. Chang, and Jyun-Fu Liang, "CMOS voltage-controlled oscillator using inductive dual-balance source degeneration," Electronics Letters, vol. 58, no. 25, pp. 946-948, December 2022.
2. Y. H. Chang, and Sih-Sian He, "Low-power dual-band voltage-controlled oscillator using a fourth-order resonant technique," Microwave and Optical Technology Letters, vol. 64, pp. 67-71, January 2022.
3. Y. C. Chiang, and Y. H. Chang, "A 60 GHz CMOS VCO using a fourth-order resonator," IEEE Microwave and Wireless Components Letters, vol. 25, no. 9, pp 609-611, September 2015. (SCI)
4. Y. H. Chang, Y. C. Chiang, and C. Y. Yang, "A 42.15-68.35 dBΩ tunable gain transimpedance amplifier using 0.18-µm CMOS process," Microwave and Optical Technology Letters, vol. 57, no. 4, pp. 830-832, April 2015. (SCI)
5. Y. H. Chang, Y. C. Chiang, and C. Y. Yang, "A V-band push-push VCO with wide tuning range using 0.18 µm CMOS process," IEEE Microwave and Wireless Components Letters, vol. 25, no. 2, pp. 115-117, February 2015. (SCI)
6. C. Y. Huang, Y. H. Chang, and Y. C. Chiang, "A down-conversion mixer using 90-nm CMOS process for 60-GHz applications," Microwave and Optical Technology Letters, vol. 56, no. 10, pp. 2456-2458, October 2014. (SCI)

1. Y. H. Chang, and Yong-Lun Luo, "A CMOS voltage-controlled oscillator using dual-balance source degeneration," in Asia-Pacific Microwave Conference, Yokohama, Japan, pp. 725-727, December 2022.
2. Y. H. Chang, and Chin-He Chen, "A two-stage low-noise amplifier with extra capacitor structures for low-power applications," in 4th IEEE Eurasia Conference on IoT, Communication and Engineering, Yunlin, Taiwan, pp. 141-143, October 2022.
3. Y. H. Chang, and Y. C. Chiang, "A novel injection-locked frequency tripler for V-band applications," in 14th European Microwave Integrated Circuits Conference, Paris, France, pp. 290-293, September 2019.
4. Y. H. Chang, and Y. C. Chiang, "A novel K-band divide-by-4 injection-locked frequency divider," in 2018 Asia-Pacific Microwave Conference, Kyoto, Japan, pp. 264-266, November 2018.
5. Y. H. Chang, and Y. C. Chiang, "A low-power K-band divide-by-5 injection-locked frequency divider," in 46th European Microwave conference, London, UK, pp. 289-292, October 2016.
6. Y. H. Chang, and Y. C. Chiang, "A dual V-band push-push VCO using the 0.18µm CMOS process technology," in Progress in Electromagnetics Research Symposium, Prague, Czech Republic, July 6-9, 2015.
7. Y. H. Chang, and Y. C. Chiang, "A divide-by-3 injection-locked frequency divider in 0.18 µm CMOS process for K band Applications," IEEE MTT-S International Microwave Symposium, Phoenix, Arizona, USA, May 17-22, 2015.
8. Y. H. Chang, and Y. C. Chiang, "A V-band push-push VCO with wide tuning in 0.18 µm CMOS process," in 44th European Microwave conference, Rome, Italy, pp. 584-587, October 2014.
9. Y. H. Chang, and Y. C. Chiang, "A dual-band push-push VCO using 0.18µm CMOS process for V-band applications," in The 25th VLSI Design/CAD Symposium European, Taichung, Taiwan, August 5-8, 2014.
10. Y. H. Chang, Chia-Yang Huang, and Y. C. Chiang, "A 24GHz down-conversion mixer with low noise and high gain," in 7th European Microwave Integrated Circuit Conference, Amsterdam ,The Netherlands, pp. 285-288 ,October 2012.
11. Y. C. Chiang, and Y. H. Chang, "A Back-Gate Coupling QVCO with Kvco Linearization Technique," in IEEE International Symposium on Radio-Frequency Integration Technology, Singapore, Dec. 9–11, 2009.

Special Achievements

1. Advanced Integrated Circuit Design and System Application Laboratory

1. Yu-Hsin Chang, et al. Divide-by-3 Injection-Locked Frequency Divider Circuit Using Stacked Double Cross-Coupled Transistor Pairs (Taiwan Patent), 2016.

1. Yu-Hsin Chang, Mixed-Signal IC Implementation and Verification (2015.09 - 2017.09).

1. Yu-Hsin Chang, "Application of FastSPICE Simulation Software CustomSim in Integrated Circuit Design", CICeNEWS Issue 200 (National Chip Implementation Center Newsletter), July 2017.

1. National Academy for Educational Research (2022.08 - 2023.03), Textbook Reviewer for Electrical and Electronic Engineering Cluster in Technical High Schools
2. National Academy for Educational Research (2019.08 - 2020.05), Textbook Reviewer for Electrical and Electronic Engineering Cluster in Technical High Schools

1. Life Experiences in the IC Industry, Department of Electronic Engineering, National Yunlin University of Science and Technology, 2018.06.15.
2. Application of FastSPICE Tools in Integrated Circuit Design, Department of Electrical Engineering, National Chiayi University, 2018.05.09.

1. Academic Member, Taiwan Electromagnetic Industry-Academia Consortium, 2021.02.23 - Present
2. Member, Taiwan Integrated Circuit Design Society, 2021.06.01 - Present

1. Session Chair for Data and Power Converters, 35th VLSI Design / CAD Symposium (2024.08)
2. Session Chair for Nyquist-Rate Data Converters, 34th VLSI Design / CAD Symposium (2023.08)
3. Session Chair for Advanced Circuit Techniques for RF/mm-Wave Applications, 33rd VLSI Design / CAD Symposium (2022.08)

1. Yu-Hsin Chang, and Chin-He Chen, ”A two-stage low-noise amplifier with extra capacitor structures for low-power applications,” in 4th IEEE Eurasia Conference on IoT, Communication and Engineering, Yunlin, Taiwan, pp. 141-143, October 2022.