教學與服務經歷

• 現職：國立虎尾科技大學 電子工程系 副教授 (2025/02~迄今)
• 經歷：
  • 國立虎尾科技大學 電子工程系 助理教授 (2018/02~2025/01)
  • 國立虎尾科技大學 教務處招生業務組 組長 (2018/08~2020/01)
  • 國家晶片系統設計中心(CIC) 助理研究員 (2015/09~2017/09)
  • 茂德科技 良率提昇工程師 (2007/01~2009/06)
  • 瑞佑科技 數位IC設計工程師 (2003/06~2004/11)
  • 九暘電子 系統設計工程師 (2001/11~2003/06)
  • 朝陽科技大學 資訊工程系 兼任講師 (2014/02~2015/01)
  • 國立勤益科技大學 電子工程系 兼任講師 (2009/08~2014/07)
  • 朝陽科技大學 資訊工程系 兼任講師 (2011/02~2012/01)

專長

• 射頻積體電路設計 (RF Integrated Circuit Design)
• 混合信號積體電路設計 (Mixed-Signal Integrated Circuit Design)
• 數位積體電路設計 (Digital Integrated Circuit Design)
• 無線應用系統晶片設計 (Wireless Application SoC Design)
• FPGA系統應用設計 (FPGA System Application Design)
• 電路系統應用設計 (Circuit System Application Design)

相關計畫

1. 應用於5G新穎式低功耗頻率合成器設計 (2018.12.01~2019.11.30)

1. 乘法數位類比轉換器積體電路設計 (2023.02.21~2023.07.31)
2. 乘法數位類比轉換器積體電路設計整合及測試 (2023.08.01~2024.01.31)

論文發表

1. Y. H. Chang, and Jyun-Fu Liang, "CMOS voltage-controlled oscillator using inductive dual-balance source degeneration," Electronics Letters, vol. 58, no. 25, pp. 946-948, December 2022.
2. Y. H. Chang, and Sih-Sian He, "Low-power dual-band voltage-controlled oscillator using a fourth-order resonant technique," Microwave and Optical Technology Letters, vol. 64, pp. 67-71, January 2022.
3. Y. C. Chiang, and Y. H. Chang, "A 60 GHz CMOS VCO using a fourth-order resonator," IEEE Microwave and Wireless Components Letters, vol. 25, no. 9, pp 609-611, September 2015. (SCI)
4. Y. H. Chang, Y. C. Chiang, and C. Y. Yang, "A 42.15-68.35 dBΩ tunable gain transimpedance amplifier using 0.18-µm CMOS process," Microwave and Optical Technology Letters, vol. 57, no. 4, pp. 830-832, April 2015. (SCI)
5. Y. H. Chang, Y. C. Chiang, and C. Y. Yang, "A V-band push-push VCO with wide tuning range using 0.18 µm CMOS process," IEEE Microwave and Wireless Components Letters, vol. 25, no. 2, pp. 115-117, February 2015. (SCI)
6. C. Y. Huang, Y. H. Chang, and Y. C. Chiang, "A down-conversion mixer using 90-nm CMOS process for 60-GHz applications," Microwave and Optical Technology Letters, vol. 56, no. 10, pp. 2456-2458, October 2014. (SCI)

1. Y. H. Chang, and Yong-Lun Luo, "A CMOS voltage-controlled oscillator using dual-balance source degeneration," in Asia-Pacific Microwave Conference, Yokohama, Japan, pp. 725-727, December 2022.
2. Y. H. Chang, and Chin-He Chen, "A two-stage low-noise amplifier with extra capacitor structures for low-power applications," in 4th IEEE Eurasia Conference on IoT, Communication and Engineering, Yunlin, Taiwan, pp. 141-143, October 2022.
3. Y. H. Chang, and Y. C. Chiang, "A novel injection-locked frequency tripler for V-band applications," in 14th European Microwave Integrated Circuits Conference, Paris, France, pp. 290-293, September 2019.
4. Y. H. Chang, and Y. C. Chiang, "A novel K-band divide-by-4 injection-locked frequency divider," in 2018 Asia-Pacific Microwave Conference, Kyoto, Japan, pp. 264-266, November 2018.
5. Y. H. Chang, and Y. C. Chiang, "A low-power K-band divide-by-5 injection-locked frequency divider," in 46th European Microwave conference, London, UK, pp. 289-292, October 2016.
6. Y. H. Chang, and Y. C. Chiang, "A dual V-band push-push VCO using the 0.18µm CMOS process technology," in Progress in Electromagnetics Research Symposium, Prague, Czech Republic, July 6-9, 2015.
7. Y. H. Chang, and Y. C. Chiang, "A divide-by-3 injection-locked frequency divider in 0.18 µm CMOS process for K band Applications," IEEE MTT-S International Microwave Symposium, Phoenix, Arizona, USA, May 17-22, 2015.
8. Y. H. Chang, and Y. C. Chiang, "A V-band push-push VCO with wide tuning in 0.18 µm CMOS process," in 44th European Microwave conference, Rome, Italy, pp. 584-587, October 2014.
9. Y. H. Chang, and Y. C. Chiang, "A dual-band push-push VCO using 0.18µm CMOS process for V-band applications," in The 25th VLSI Design/CAD Symposium European, Taichung, Taiwan, August 5-8, 2014.
10. Y. H. Chang, Chia-Yang Huang, and Y. C. Chiang, "A 24GHz down-conversion mixer with low noise and high gain," in 7th European Microwave Integrated Circuit Conference, Amsterdam ,The Netherlands, pp. 285-288 ,October 2012.
11. Y. C. Chiang, and Y. H. Chang, "A Back-Gate Coupling QVCO with Kvco Linearization Technique," in IEEE International Symposium on Radio-Frequency Integration Technology, Singapore, Dec. 9–11, 2009.

特殊事蹟

1. 前瞻積體電路設計與系統應用實驗室 (Advanced Integrated Circuit Design and System Application Laboratory)

1. 張裕鑫等。疊接雙交叉耦合對電晶體之除三注入鎖定除頻器電路(中華民國專利)，2016。

1. 張裕鑫, Mixed-Signal IC Implementation and Verification (2015.09~2017.09)。

1. 張裕鑫, "使用FastSPICE模擬軟體CustomSim應用於積體化電路設計", 第200期CICeNEWS (國家晶片系統設計中心電子報), July 2017.

1. 國家教育研究院 (111.08~112.03) 技術型高級中學電機與電子群教科書審查人
2. 國家教育研究院 (108.08~109.05) 技術型高級中學電機與電子群教科書審查人

1. IC人生經歷談, 國立雲林科技大學電子工程學系, 2018.06.15.
2. 使用FastSPICE工具應用於積體電路設計, 國立嘉義大學電機工程學系, 2018.05.09.

1. 台灣電磁產學聯盟學界會員, 2021.02.23~迄今
2. 台灣積體電路設計學會會員, 2021.06.01~迄今

1. 第35屆超大型積體電路設計暨計算機輔助設計技術研討會(2024.08) Data and Power Converters議程主持人
2. 第34屆超大型積體電路設計暨計算機輔助設計技術研討會(2023.08) Nyquist-Rate Data Converters議程主持人
3. 第33屆超大型積體電路設計暨計算機輔助設計技術研討會(2022.08) Advanced Circuit Techniques for RF/mm-Wave Applications議程主持人

1. Yu-Hsin Chang, and Chin-He Chen, ”A two-stage low-noise amplifier with extra capacitor structures for low-power applications,” in 4th IEEE Eurasia Conference on IoT, Communication and Engineering, Yunlin, Taiwan, pp. 141-143, October 2022.